A clock detection circuit is a circuit that detects whether a periodic clock signal is present, i.e. whether it is toggling or not. For example, a phase locked loop (PLL) may lose its reference clock input. To detect the presence or absence of such a clock signal, both analog and digital approaches are known. The analog approach relies on analog circuits that consume a relatively large amount of circuit area and require a precise reference voltage for accurate detection. One known digital alternative requires an auxiliary oscillator to establish a time window in which to check for clock transitions. While the digital approach reduces the required circuit area, an auxiliary oscillator may not always be available.
In the following description, the use of the same reference numerals in different drawings indicates similar or identical items. Unless otherwise noted, the word “coupled” and its associated verb forms include both direct connection and indirect electrical connection by means known in the art, and unless otherwise noted any description of direct connection implies alternate embodiments using suitable forms of indirect electrical connection as well. Additionally, the terms remap and migrate, and variations thereof, are utilized interchangeably as a descriptive term for relocating.